According to a prior art FEC (Forward Error Correction), the number m of bits per one symbol of an error correction code is so set up as to be equal to a factor of the parallel number n of parallel sequences to be coded at the time of the error correction coding processing (for example, nonpatent reference 1).
In general, according to such an FEC method, when the bit number m per one symbol of an error correction code is increased with the coding rate being fixed, the code length N can be lengthened and therefore the error correction capability can be improved. Therefore, in order to improve the error correction capability while a condition for selecting the bit number m per one symbol of an error correction code from the factors of the parallel number n of parallel sequences to be coded at the time of the error correction coding processing is satisfied, what is necessary is just to select, as the bit number m per one symbol of an error correction code, the largest possible factor from among the factors of n.
[Nonpatent reference 1] ITU-T recommendation G.975
However, there may be a case where it is difficult to select another factor from among the factors of n, considering the viewpoint of the circuit scale. For example, in the case of n=128, when one RS(255,239) of RS (Reed-Solomon) codes is adopted, the bit number per one symbol of an error correction code is 8, though, if 16 which is a factor of 128 and which is the second largest to 8 is selected in order to further improve the error correction capability, the circuit scale of the coding circuit for carrying out coding using a block code and that of the decoding circuit are greatly increased.
The present invention is made in order to solve the above-mentioned problem, and it is therefore an object of the present invention to construct a flexible error correction coding frame which is not influenced by constraints imposed by the frame format, thereby improving the capability of correcting random errors and burst errors.